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DG540/541/542
Vishay Siliconix
Wideband/Video "T" Switches
FEATURES
D D D D D D D Wide Bandwidth: 500 MHz Low Crosstalk: -85 dB High Off-Isolation: -80 dB @ 5 MHz "T" Switch Configuration TTL and CMOS Logic Compatible Fast Switching--tON: 45 ns Low rDS(on): 30 W
BENEFITS
D D D D D D D Flat Frequency Response High Color Fidelity Low Insertion Loss Improved System Performance Reduced Board Space Reduced Power Consumption Improved Data Throughput
APPLICATIONS
D D D D D D D D RF and Video Switching RGB Switching Local and Wide Area Networks Video Routing Fast Data Acquisition ATE Radar/FLR Systems Video Multiplexing
DESCRIPTION
The DG540/541/542 are high performance monolithic wideband/video switches designed for switching RF, video and digital signals. By utilizing a "T" switch configuration on each channel, these devices achieve exceptionally low crosstalk and high off-isolation. The crosstalk and off-isolation of the DG540 are further improved by the introduction of extra GND pins between signal pins. To achieve TTL compatibility, low channel capacitances and fast switching times, the DG540 family is built on the Vishay Siliconix proprietary D/CMOS process. Each switch conducts equally well in both directions when on.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG540
Dual-In-Line IN1 D1 GND S1 V- GND S4 GND D4 IN4 1 2 3 4 5 6 7 8 9 10 Top View 20 19 18 17 16 15 14 13 12 11 IN2 D2 GND S2 V+ GND S3 GND 9 D4 D3 IN3 10 11 12 13 IN3 IN4 D3 GND S1 V- GND S4 GND 4 5 6 7 8 18 17 16 15 14 GND S2 V+ GND S3 GND
DG540
PLCC IN 1 IN 2 D1 D2
3
2
1
20 19
TRUTH TABLE
Logic
0 1
Switch
OFF ON
Logic "0" v 0.8 V 1 Logic "1" w 2 V
Top View
Document Number: 70055 S-00399--Rev. G, 13-Sep-99
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DG540/541/542
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG541
Dual-In-Line and SOIC IN1 D1 GND S1 V- S4 GND D4
DG542
Dual-In-Line and SOIC IN2 D2 GND S2 V+ S3 GND D3
IN1 D1 S1 V- GND S4 D4 IN4
1 2 3 4 5 6 7 8 Top View
16 15 14 13 12 11 10 9
IN2 D2 S2 V+ GND S3 D3 IN3
1 2 3 4 5 6 7 8 Top View
16 15 14 13 12 11 10 9
TRUTH TABLE - DG541
Logic
0 1 Logic "0" v 0.8 V Logic "1" w 2 V
TRUTH TABLE - DG542
Logic
0 1
Switch
OFF ON
SW1, SW2
OFF ON Logic "0" v 0.8 V Logic "1" w 2 V
SW3, SW4
ON OFF
ORDERING INFORMATION
Temp Range Package Part Number
DG540
-40 to 85_C 20-Pin Plastic DIP 20-Pin PLCC 20-Pin Sidebraze DG540DJ DG540DN DG540AP DG540AP/883
-55 to 125_C
DG541
16-Pin Plastic DIP -40 to 85_C 16-Pin Narrow SOIC 16-Pin Sidebraze DG541DJ DG541DY DG541AP -55 to 125_C DG541AP/883, 5962-9076401MEA
DG542
-40 to 85_C 16-Pin Plastic DIP 16-Pin Narrow SOIC 16-Pin Sidebraze DG542DJ DG542DY DG542AP DG542AP/883, 5962-91555201MEA Document Number: 70055 S-00399--Rev. G, 13-Sep-99
-55 to 125_C
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DG540/541/542
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 21 V V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 21 V V- to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -19 V to +0.3 V Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V-) -0.3 V to (V+) +0.3 V or 20 mA, whichever occurs first VS, VD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V-) -0.3 V to (V-) +14 V or 20 mA, whichever occurs first Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Current, S or D (Pulsed 1 ms, 10% duty cycle max) . . . . . . . . . . . . . . 40 mA Storage Temperature (AP Suffix) . . . . . . . . . . . . . . . . . . -65 to 150_C (DJ, DN, DY Suffixes) . . . . . . . . -65 to 125_C Power Dissipation (Package)a 16-Pin Plastic DIPb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-Pin Plastic DIPc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-Pin Narrow Body SOICd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-Pin PLCCd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-, 20-Pin Sidebraze DIPe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Notes: a. All leads welded or soldered to PC Board. b. Derate 6.5 mW/_C above 25_C c. Derate 7 mW/_C above 25_C d. Derate 10 mW/_C above 75_C e. Derate 12 mW/_C above 75_C
470 mW 800 mW 640 mW 800 mW 900 mW
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+ GND VREF S
IN
- +
D
V-
FIGURE 1.
Document Number: 70055 S-00399--Rev. G, 13-Sep-99
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DG540/541/542
Vishay Siliconix
SPECIFICATIONSa
Test Conditions Unless Specified Parameter Analog Switch
Analog Signal Range Drain-Source On-Resistance rDS(on) Match Source Off Leakage Current Drain Off Leakage Current Channel On Leakage Current VANALOG rDS(on) DrDS(on) IS(off) ID(off) ID(on) VS = 0 V, VD = 10 V VS = 10 V, VD = 0 V VS = VD = 0 V V- = -5 V, V+ = 12 V Full Room Full Room Room Full Room Full Room Full 30 2 -0.05 -0.05 -0.05 -10 -500 -10 -500 -10 -1000 -5 5 60 100 6 10 500 10 500 10 1000 -10 -100 -10 -100 -10 -100 -5 5 60 75 6 10 100 10 100 10 100 nA A V W
A Suffix
-55 to 125_C
D Suffixes
-40 to 85_C
Symbol
V+ = 15 V, V- = -3 V VINH = 2 V, VINL = 0.8 Vf
Tempb
Typc
Mind
Maxd Mind Maxd Unit
IS = -10 mA, VD = 0 V ,
Digital Control
Input Voltage High Input Voltage Low Input Current VINH VINL IIN VIN = GND or V+ Full Full Room Full 0.05 -1 -20 2 0.8 1 20 -1 -20 2 V 0.8 1 20 mA
Dynamic Characteristics
On State Input Capacitancee Off State Input Capacitancee Off State Output Bandwidth Capacitancee CS(on) CS(off) CD(off) BW VS = VD = 0 V VS = 0 V VD = 0 V RL = 50 W, See Figure 5 DG540 DG541 Turn On Time tON RL = 1 kW CL = 35 p pF 50% t 90% to See Figure 2 Turn Off Time tOFF DG542 Charge Injection Q CL = 1000 pF, VS = 0 V See Figure 3 RIN = 75 W RL = 75 W f = 5 MHz See Figure 4 RIN = 10 W, RL = 75 W f = 5 MHz, See Figure 6 DG540 DG541 DG542 DG542 DG540 DG541 Room Room Room Room Room Full Room Full Room Full Room Full Room Room Room Room Room 14 2 2 500 45 55 20 25 70 130 100 160 50 85 60 85 70 130 100 160 ns 50 85 60 85 pC 20 4 4 20 4 4 MHz pF F
-25 -80 -60 -75 -85
Isolation Off I l i
OIRR
dB
All Hostile Crosstalk
XTALK(AH)
Power Supplies
Positive Supply Current Negative Supply Current I+ All Channels On or Off I- Room Full -3.2 -6 -9 -6 -9 Room Full 3.5 6 9 6 9 mA
Notes: a. Refer to PROCESS OPTION FLOWCHART. b. Room = 25_C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. www.vishay.com S FaxBack 408-970-5600 Document Number: 70055 S-00399--Rev. G, 13-Sep-99
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DG540/541/542
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Supply Curent vs. Temperature
6 5 4 I+ I S(off), I D(off)- Leakage 3 2 I (mA) 1 0 -1 -2 I- -3 -4 -5 -55 -35 -15 5 25 45 65 Temperature (_C) 85 105 125 0.1 pA -55 -25 0 25 50 75 Temperature (_C) 100 125 IGND 1 nA 10 nA 100 nA
ID(off), IS(off) vs. Temperature
100 pA
10 pA
1 pA
rDS(on) vs. Drain Voltage
160 r DS(on) Drain-Source On-Resistance ( W ) - r DS(on) Drain-Source On-Resistance ( W ) - 140 120 100 80 60 40 20 0 -3 -1 1 3 5 7 9 11 VD - Drain Voltage (V) -55_C V+ = 15 V V- = -3 V 125_C 42 40 38 36 34 32
V+ Constant
42 V+ = 10 V 40 38
V- Constant
V- = -5 V V+ = 12 V 36 34 V- = -3 V 32 V+ = 15 V 30 20 18 -5 -4 -3 -2 -1 0 V- - Negative Supply (V) 30 20 18 10 11 12 13 14 15 16 V+ - Positive Supply (V) V- = -1 V
25_C
On Capacitance
22 20 18 16 ISO (dB) C (pF) 14 12 10 -30 8 6 0 2 4 6 8 10 12 14 VD - Drain Voltage (V) -20 -10 1 -110 -100 -90 -80 -70 -60 -50 -40 DG542
Off Isolation
RL = 75 W
DG540
DG541
10 f - Frequency (MHz)
100
Document Number: 70055 S-00399--Rev. G, 13-Sep-99
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DG540/541/542
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Off Isolation vs. Frequency and Load Resistance (DG540)
-100 -90 -80 -70 X TALK (dB) OIRR (dB) -60 -50 -40 -30 -20 -10 0 1 10 f - Frequency (MHz) 100 1 kW 10 kW RL = 75 W 180 W -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 1 10 f - Frequency (MHz) 100 DG541 DG542 DG540
All Hostile Crosstalk
40 30 20 10
Charge Injection vs. VS
90 80 70 60 Time (ns)
Switching Times vs. Temperature (DG540/541)
Q (pC)
tON 50 40 30
0 -10 -20 CL = 1000 pF -30 -40 -3 -2 -1 0 1 2 3 4 5 6 7 8 VS - Source Voltage (V)
20 10 0 -55 -25 0 25 50
tOFF
75
100
125
Temperature (_C)
Switching and Break-Before-Make Time vs. Temperature (DG542)
90 80 70 60 Time (ns) 50 40 tOFF 30 20 10 0 -55 -25 0 25 50 75 100 125 10 0 tBBM tON V+ - Positive Supply (V) 18 20
Operating Supply Voltage Range
16
14
Operating Voltage Area
12
-1
-2
-3
-4
-5
-6
Temperature (_C)
V- - Negative Supply (V)
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Document Number: 70055 S-00399--Rev. G, 13-Sep-99
DG540/541/542
Vishay Siliconix
TEST CIRCUITS
+15 V V+ 3V S IN GND V- RL 1 kW D VO CL 35 pF Logic Input 3V 50% tr <20 ns tf <20 ns
Switch Input Switch Output
VS 90% 0 tON tOFF
-3 V CL (includes fixture and stray capacitance) RL VO = VS RL + rDS(on)
FIGURE 2. Switching Time
+15 V V+ S IN 3V GND V- D VO CL 1000 pF INX ON
DVO
Rg
VO
Vg
OFF
ON
-3 V
DVO = measured voltage error due to charge injection The charge injection in coulombs is DQ = CL x DVO
FIGURE 3. Charge Injection
C
+15 V C
V+
+15 V
VS Rg = 75 W 0 V, 2.4 V
S
D
VO
VS Rg = 50 W 0 V, 2.4 V
S
V+
D
VO
IN GND V- C
RL 75 W
IN GND V-
RL 50 W C
-3 V Off Isolation = 20 log C = RF Bypass VS VO
-3 V
FIGURE 4. Off Isolation
FIGURE 5. Bandwidth
Document Number: 70055 S-00399--Rev. G, 13-Sep-99
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DG540/541/542
Vishay Siliconix
TEST CIRCUITS
+15 V C
V+ S1 10 W 2.4 V INX S2 S3 S4 GND V- D2 D3 D4 RL D1 RL 75 W VO
RL RL
C -15 V VOUT XTALK(AH) + 20 log10 V IN
FIGURE 6. All Hostile Crosstalk
APPLICATIONS
Device Description The DG540/541/542 family of wideband switches offers true bidirectional switching of high frequency analog or digital signals with minimum signal crosstalk, low insertion loss, and negligible non-linearity distortion and group delay. Built on the Siliconix D/CMOS process, these "T" switches provide excellent off-isolation with a bandwidth of around 500 MHz (350 MHz for DG541). Silicon-gate D/CMOS processing also yields fast switching speeds. An on-chip regulator circuit maintains TTL input compatibility over the whole operating supply voltage range, easing control logic interfacing. Circuit layout is facilitated by the interchangeability of source and drain terminals. attenuation effect on the analog signal - which is frequency dependent (like an RC low-pass filter). The -3-dB bandwidth of the DG540 is typically 500 MHz (into 50 W). This measured figure of 500 MHz illustrates that the switch channel can not be represented by a two stage RC combination. The on capacitance of the channel is distributed along the on-resistance, and hence becomes a more complex multi stage network of R's and C's making up the total rDS(on) and CS(on). See Application Note AN502 for more details.
Off-Isolation and Crosstalk
Frequency Response A single switch on-channel exhibits both resistance [rDS(on)] and capacitance [CS(on)]. This RC combination has an
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Off-isolation and crosstalk are affected by the load resistance and parasitic inter-electrode capacitances. Higher off-isolation is achieved with lower values of RL. However, low values of RL increase insertion loss requiring gain adjustments down the line. Stray capacitances, even a fraction of 1 pF, can cause a large crosstalk increase. Good layout and ground shielding techniques can considerably improve your ac circuit performance.
Document Number: 70055 S-00399--Rev. G, 13-Sep-99
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DG540/541/542
Vishay Siliconix
APPLICATIONS
Power Supplies A useful feature of the DG54X family is its power supply flexibility. It can be operated from a single positive supply (V+) if required (V- connected to ground). Note that the analog signal must not exceed V- by more than -0.3 V to prevent forward biasing the substrate p-n junction. The use of a V- supply has a number of advantages: 1. It allows flexibility in analog signal handling, i.e., with V- = -5 V and V+ = 12 V; up to "5-V ac signals can be controlled. The value of on capacitance [CS(on)] may be reduced. A property known as `the body-effect' on the DMOS switch devices causes various parametric effects to occur. One of these effects is the reduction in CS(on) for an increasing V body-source. Note, however, that to increase V- normally requires V+ to be reduced (since V+ to V- = 21 V max.). Reduction in V+ causes an increase in rDS(on), hence a compromise has to be achieved. It is also useful to note that optimum video linearity performance (e.g., differential phase and gain) occurs when V- is around -3 V. V- eliminates the need to bias the analog signal using potential dividers and large coupling capacitors.
V+ S1 S2 S3 S4 GNDs V- D1 D2
Suitable decoupling capacitors are 1- to 10-mF tantalum bead, plus 10- to 100-nF ceramic.
+15 V
+ C1 C2
2.
DG540
D3 D4
C1 = 10 mF Tantalum C2 = 0.1 mF Ceramic
C1 + -3 V
C2
3.
FIGURE 7. Supply Decoupling
Decoupling It is an established RF design practice to incorporate sufficient bypass capacitors in the circuit to decouple the power supplies to all active devices in the circuit. The dynamic performance of the DG54X is adversely affected by poor decoupling of power supply pins. Also, of even more significance, since the substrate of the device is connected to the negative supply, adequate decoupling of this pin is essential.
Board Layout PCB layout rules for good high frequency performance must be observed to achieve the performance boasted by the DG540. Some tips for minimizing stray effects are: 1. Use extensive ground planes on double sided PCB, separating adjacent signal paths. Multilayer PCB is even better. Keep signal paths as short as practically possible, with all channel paths of near equal length. Careful arrangement of ground connections is also very important. Star connected system grounds eliminate signal current flowing through ground path parasitic resistance from coupling between channels.
Rules: 1. 2. 3. Decoupling capacitors should be incorporated on all power supply pins (V+, V-). (See Figure 7.) They should be mounted as close as possible to the device pins. Capacitors should have good high frequency characteristics - tantalum bead and/or monolithic ceramic types are adequate. 2. 3.
Document Number: 70055 S-00399--Rev. G, 13-Sep-99
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DG540/541/542
Vishay Siliconix
APPLICATIONS
Figure 8 shows a 4-channel video multiplexer using a DG540.
+15 V V+ CH1 CH2 75 W 75 W 75 W CH3 CH4 + A=2 - DIS 250 W 250 W -3 V
Si582
75 W
DG540
V- 75 W
TTL Channel Select
FIGURE 8. 4 by 1 Video Multiplexing Using the DG540
Figure 9 shows an RGB selector switch using two DG542s.
+15 V V+ R1 75 W R2 75 W G1 75 W G2 75 W Green Out Red Out
DG542
V- -3 V +15 V V+ B1 75 W B2 75 W Sync 1 75 W Sync 2 75 W Sync Out Blue Out
Si584
DG542
RGB Source Select V- -3 V
FIGURE 9. RGB Selector Using Two DG542s
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Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000 Revision: 08-Apr-05
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